Power converters are employed in electronic equipment to control power delivered to a variety of loads. Power input is typically 50 or 60 Hz at standard voltages such as 110V, 220V, 440V, 2.4 kV, 3.3 kV, etc. Power converters are used to rectify the input voltage into a DC level; an inverter is then used to invert the DC voltage to an AC voltage. Industrial uses involving varying the frequency and the voltage magnitude.
Circuits used to invert the DC voltage employ switching devices which are turned on and off with a prescribed modulation pattern. This provides an output signal having a desired frequency and magnitude. For example, a typical modulation pattern that may be employed is pulse width modulation (PWM). PWM alters the width of the conduction waveform of the switching devices so that, after filtering, output voltage varies from a positive peak voltage through 0 volts to a negative peak voltage thereby producing an alternating voltage output.
Typical switching circuits employed in an inverter circuit include bi-polar transistors, insulated gate bi-polar transistors (IGBTs), gate turn-off thyristors (GTOs), silicon-controlled rectifier devices (SCR's) and integrated gate commutated thyristors (IGCTs), among others. Such switching circuits incur several types of losses including switching device losses and freewheeling diode losses (for inductive inverter circuits).
Switching Device Losses
Switching device losses include two main sources, switching loss and conduction loss. Conduction losses are the normal losses of the switching device while conducting current when running in a saturated condition. Switching losses are the losses associated with the actions of turning active switching devices on and off. Switching losses occur when there is simultaneously, high voltage across the device and current through it during transitions between on and off. Typically a power converter uses PWM with the switching device used in so-called “hard switching” mode (HSM). HSM refers to switching in which the inverter switching devices block voltage while simultaneously conducting current during transition between on and off. Power loss is incurred during this period of simultaneous voltage across the device and current through the device. This power loss is referred to as VI turn-on loss and VI turn-off loss to indicate, that for HSM, power loss is incurred each switching cycle during the turning on and turning off of the switching device. Because switching losses are incurred every time the device turns on and off, higher device frequencies result in greater switching losses.
Losses associated with turning the switching device on include the VI turn-on loss, conductivity modulation loss (for bipolar device) and capacitance discharge loss, while losses associated with turning the switching device off include the VI turn-off loss and tail current loss (in some device under certain conditions).
Diode Losses
The diode of the inductive inverter circuits incurs conduction losses (typically a function of device design and current), conduction modulation losses (incurred when the switching device is turned on), and reverse recovery losses (incurred when the switching device is turned off).
Typical losses are described more fully below in reference to FIG. 1, which illustrates a hard switching circuit in accordance with the prior art. Switching circuit 100, shown in FIG. 1 is an HSM circuit, which may be used to explain the noted sources of switching losses. Switching circuit 100 includes an IGBT switching device 105 with its collector 106 connected to the positive end 111 of a DC source voltage 110 having a voltage value of E volts. The emitter 107 of the IGBT switching device 105 is connected to an inductor 115 representing the lead inductance in series with the IGBT switching device 105. The inductor 115 is in-turn connected to inductors 120 and inductor 130.
Inductor 120 represents the lead inductance of diode 125 and is in-turn connected to the cathode 126 of diode 120. Inductor 130 is a large filter inductor and is connected in-turn to the positive end 136 of filter capacitor 135 and the positive side 141 of the load 140.
A transistor drive circuit 145 is connected to the base 108 of the IGBT switching device 105. The negative end 112 of the DC source voltage 110, anode 127 of diode 125, the negative end 137, of capacitor 135, and the negative side 142, of the load 140, are connected to ground 150.
FIGS. 2A-2F illustrate the time during which various power losses occur and the magnitude of the losses in regard to the switching circuit 100 of FIG. 1 in accordance with the prior art.
VI Turn-Off Loss
FIG. 2A illustrates VI turn-off loss. When switching off the IGBT switching device 100 (switch), the currents and current paths do not change (assuming there is a large filter inductor) until the voltage across the switch is higher than the DC source voltage 110, at which time the current will start to fall. As shown in FIG. 2A the current through the switch, represented by solid line 205, is constant from time t0 to time t1 during which the voltage across the switch, represented by dashed line 210 rises to the level of the DC source voltage 110. When the voltage across the switch reaches the level of the DC source voltage 110 (e.g., at time t1), the current will fall until it reaches zero (at time t2). Note that FIG. 2A assumes no tail current (described below) in the switch.
When the switch is turned off, the current commutates to the diode 125 as follows. The current decays at a rate determined by the size of the inductors 115 and 120 and the voltage level above the DC source voltage 110. That is, when the voltage across switch is higher than DC source voltage 110, the amount of voltage over and above the DC source voltage 110 will divide between inductors 115 and 120 with the end 117 of inductor 115 and the end 121 of inductor 120 being positive. The voltage will divide in the ratio of the size of inductors 115 and 120 such that −di/dt of inductor 115 will be equal to the +di/dt of inductor 120. This process will continue until the current reaches zero in the switch. When the current reaches zero the voltage across the switch will drop to approximately the voltage level of the DC source voltage 110.
As shown in FIG. 2A, the VI turn-off power loss is represented by hatched area 215 and occurs during the period in which the voltage across the switch begins to rise and before the current falls to zero (e.g., from time t0 to time t2). The VI turn-off loss is typically the highest of the switching losses and can be substantial especially for circuits employing HSM. For example, for a typical system in which the current is 1,000 amps (A) and the voltage is 600 volts (V), the power loss at the peak power point (e.g., time t1) is 600 kilowatts (kW) and the average power loss is approximately 300 kW over the time t0 to t2. This time may typically approach 10% of the switching period resulting in a VI turn-off loss of 30 kW.
Tail Current Loss
While the VI turn-off loss applies to circuits implementing a bi-polar device as well as to circuits implementing a field effect transistor (FET), an additional turn-off loss, particular to most circuits implementing a bi-polar switching device is the tail current turn-off loss (tail current loss).
FIG. 2B illustrates tail current loss. As shown in FIG. 2B, the voltage represented by dashed line 225 is the same as that shown in FIG. 2A and the current represented by solid line 220 falls in a manner similar to that shown in FIG. 2A during the period from time t1 to time t2. The size of inductors 115 and 120, and the voltage level across the switch above the DC source voltage 110 determines the rate at which the current decays until time t2. For most bi-polar device, a point (e.g., time t2) is reached at which the switching device itself determines the current decay rate and the current decays at a slower rate thereby increasing the power loss. The power loss between time t2 and time t3 is the tail current loss. The cause and extent of tail current losses are complex, but are generally due to charges stored in the device due to minority carrier injection that occurs with current conduction through most bipolar devices and determined by the voltage and current turn-off conditions and the switching time. For example, for a switching device implementing an IGBT, a lower voltage rating of the switching device for a given voltage at turn-off, results in a lower tail current because there will be fewer stored charges in the device in its saturated, on-state, condition.
The tail current losses are typically much lower than the VI turn-off losses from time t0-time t2. If the VI turn-off loss is reduced and the circuit is switched at substantially higher frequencies, the tail current losses at such higher switching frequencies may be substantially greater than typical VI turn-off losses at a lower frequency. It is for this reason that the tail current losses are considered a significant disadvantage of typical prior art schemes.
VI Turn-On Loss
FIG. 2C illustrates VI turn-on loss. When the switch is turned on, the current across the switch starts to rise as soon as the voltage across the switch begins to fall. As shown in FIG. 2C the current through the switch, represented by solid line 235 does not begin to rise until the voltage, represented by dashed line 240, begins to fall (i.e. at time t1). Therefore from time t0 to time t1 there is no VI turn-on loss. The VI turn-on power loss is represented by hatched area 245 and occurs during the period in which the current across the switch begins to rise and before the voltage falls to zero (e.g., from time t1 to time t2). The VI turn-on loss depends on the rate at which the voltage falls and the rate at which the current rises. If the voltage falls during the same period in which the current rises, then the VI turn-on loss would be similar to that shown in FIG. 2A (though not as great because upon turning off the switch the current doesn't begin to fall until after the voltage has risen above the DC source voltage). If the time required for the current to rise is greater than the time required for the voltage to fall, then the VI turn-on loss is reduced proportionally.
When turning the switch on, if the voltage drops to substantially 0 V before the current starts to rise, then the switch will have no (or negligible) VI turn-on loss. In some soft switching topologies (one or more switching losses not present), discussed more fully below, this condition is the result of the voltage and current timing effects of the circuit topology (e.g., the inductors and capacitors added to the circuit to attain soft switching). This is illustrated in FIG. 2E in which the voltage represented as dashed line 270 falls to near 0 volts at a time (e.g., time t1) prior to the time (e.g., time t2) at which the current represented as solid line 265 begins to rise.
Conductivity Modulation Loss
While the VI turn-on loss applies to circuits implementing a bi-polar device as well as to circuits implementing a field effect transistor (FET), an additional turn-on loss, particular to circuits implementing a bi-polar switching device is the conductivity modulation loss (CM loss), also referred to as conduction modulation loss.
FIG. 2D illustrates the CM loss for a switch implementing a bi-polar device. As shown in FIG. 2D, the current through the switch represented by solid line 250 is the same as that shown in FIG. 2C and the voltage across the switch represented by dashed line 255 falls in a manner similar to that shown in FIG. 2C during the period from time t1 to time t2. From time t2 to time t3 conductivity modulation occurs increasing the turn-on loss. This period is referred to as conductivity modulation time.
In a bipolar device, the n-region (assuming this is the region that is predominantly responsible for blocking voltage in the off state) of the device, just after starting to conduct current, has a higher effective resistance than it has after the current has been flowing for some time. As the current flows the effective resistance of the n-region goes down since minority carriers injected into the n-region (by initial current flow) reduce the n-region resistivity and thus modulate the conductivity. After several microseconds (starting at time t2 in FIG. 2D), the forward voltage drop of the bipolar device will reach its DC forward drop voltage (at time t3 in FIG. 2D) for the current flowing. For example, the forward drop of a bi-polar transistor device at full load (e.g., 100 A) may be 40 V. After the current has been flowing for some time (e.g., 10 microseconds) the forward load may drop to 2 V. The resistance has changed from 0.4 ohms to 0.02 ohms (e.g., the resistance of the device has been modulated as the device conducts current).
The turn-on losses of a switch implementing a bi-polar device are represented by hatched area 260 and occur during the period in which the current through the switch begins to rise and before the voltage falls to zero (e.g., from time t1 to time t3). The CM losses are those losses between time t2 and time t3.
The CM losses are typically much lower than the VI turn-on losses. For example, the CM losses are typically about 20% of the VI turn-on losses. If the VI turn-on loss is reduced and the circuit is switched at substantially higher frequencies, the CM losses at such higher switching frequencies may be substantially greater than typical VI turn-on losses at lower frequencies. It is for this reason that CM losses, like tail current losses described above, are considered a significant disadvantage of typical prior art schemes.
Circuits implementing a bi-polar device and having topologies that result in the voltage dropping to near 0 volts before the current starts to rise will still have CM losses. Such CM losses are illustrated in FIG. 2F in which the voltage represented as dashed line 285 is at or near 0 volts until the current represented as solid line 280 begins to rise at time t1. The voltage rises as the current rises from time t1 to time t2 due to conduction modulation. The voltage then falls to a low voltage at a time t3. The conductivity modulation losses represented by hatched area 290 are incurred from time t1 to time t3.
Capacitive Loss
All switching devices have a capacitance across their power terminals. The capacitance is from the collector to emitter in IGBTs and bi-polar transistors. When the switching device turns on, the capacitance is discharged into the switching device. The energy stored in the capacitor is absorbed in the switching device itself and becomes part of the turn-on switching losses. Typically the energy absorbed is small, even at high frequencies. Soft switching topologies exist that naturally discharge the capacitance before the switching device is turned on with no added circuitry.
Free Wheeling Diode Switching Loss
The switching losses described above did not take into account the sweep out current of the free wheeling diode 125 of FIG. 1 during turn-on. That is, when the switch is off, current is freewheeling through a filter inductor. When the switch is turned on, the current of the diode is reversed until the diode starts to block. At this point, the voltage across the diode increases dramatically resulting in substantial losses in the diode with a corresponding current over shoot in the current in the switching device 105, and significantly more switching loss in the switching device 105, which is not illustrated in FIG. 2C.
Soft-Switching Topologies
There are soft switching topologies that do not have diode turn-on switching loss (e.g., the diode is blocking voltage prior to turn on). For HSM, especially under high voltage conditions, the sweep out current is very high and increases the losses during turn-on to several times that shown in the FIGS. 2A and 2B.
Some attempts have been made to make inverter circuits using so-called “soft switching” mode (SSM) in which the voltage is switched when current through the device is zero, or where the current is switched when voltage across the device is zero. For circuits operating in SSM, one or more of the major switching losses is not present. Soft switching is achieved by using inductors and capacitors to delay current and/or voltage changes. This can result in increased costs and generate undesirable circuit conditions and fault requirements. Moreover, SSM applications reduce either the VI turn-on switching losses or the VI turn-off switching losses, but normally do not address both losses.
Other attempts to address switching losses through varied circuit topologies or modulation schemes have been made but these have not addressed all switching losses in one circuit. For example, some schemes have included loss-reduced snubbers, filters, or additional power devices to assist and/or share current or voltage during switching to reduce VI turn-off losses in the main conduction device, but without addressing VI turn-on losses due to the free wheeling diodes. For example, for low power applications using a metal-oxide semiconductor (MOS) device to control switching in voltage source inverters may employ fast switching and snubbering to reduce VI turn-off losses, but VI turn-on losses and free wheel diode losses remain. CM losses, which are a function of device design, may typically be reduced by modifying the device design, however, this may result in increased switching losses.
Other efforts have been made to address VI turn-on loss, but without addressing VI turn-off loss, diode loss, or other losses such as CM losses and tail current losses incurred with bipolar devices typically employed in high power applications. For such devices, switching losses are typically the determining factor in power handling limitations and in frequency limitations.